Symposium Program
Thursday, 03 Oct 2024
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08:30 - 09:00 Welcome Speech
09:00 - 10:00 Keynote 1
Title: Towards a Design Flow for Verified AI-Based Autonomy
Authors: Prof. Sanjit A Seshia
Affiliation: University of California, Berkeley
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10:00 - 10:30 Coffee Break
10:30 - 12:30 Technical Session 1: Formal Verification and Monitoring
10:30 - 11:00 Title: Fast Robust Monitoring for Signal Temporal Logic with Value Freezing Operators (STL)
Authors: B. Ghorbel, V. Prabhu
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11:00 - 11:30 Title: Modelling and proving pipeline monotonicity in Coq
Authors: A. Gruin, A. Bonenfant, T. Carle, C. Rochange
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11:30 - 12:00 Title: Perception-based Runtime Monitoring and Verification for Human-Robot Construction Systems
Authors: A. Pramanik, S. W. Choi, Y. Li, L. Nguyen, K. Kim, D. H. Tran
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12:00 - 12:30 Title: Safety and Progress Proofs of Reactive Autonomous Racing Algorithm
Authors: A. Karimi, M. Goyal, P. S. Duggirala
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12:30 - 13:30 Lunch Break
13:30 - 15:00 Technical Session 2: Learning-based Systems
13:30 - 14:00 Title: Model-free PAC Time-Optimal Control Synthesis with Reinforcement Learning
Authors: M. Liu, P. Lu, X. Chen, F. Kong, O. Sokolsky, I. Lee
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14:00 - 14:30 Title: Exploring Compositional Neural Networks for Real-Time Systems
Authors: S. Chatterjee, N. Allen, N. Patel, P. Roop.
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14:30 - 15:00 Title: Machine-Learning-Guided Test Case Design and Fault Localization of Complex Software Systems
Authors: Y. Ji, S. Mak, R. Lekivetz, J. Morgan
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15:00 - 15:30 Coffee Break
15:30 - 17:00 Technical Session 3: Invited Session
15:30 - 16:00 Title: Logical Synchrony + Functional Processes => Observable Determinacy
Authors: S. Prasad
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16:00 - 16:30 Title: Self-Powering Dataflow Networks – Concepts and Implementation
Authors: A. Karim, J. Falk, D. Schmidt, J. Teich
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16:30 - 17:00 Title: Neuro-symbolic Generative AI Assistant for System Design
Authors: S. Jha, S. K. Jha, and A. Velasquez
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Friday, 04 Oct 2024
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09:00 - 10:00 Keynote 2
Title: From Neural Network Verification to Formal Verification for Neuro-Symbolic Artificial Intelligence (AI)
Authors: Taylor T. Johnson
Affiliation: Vanderbilt University
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10:00 - 10:30 Coffee Break
10:30 - 12:30 Technical Session 4: Hardware/CPS Verification
10:30 - 11:00 Title: Formal Fault Injection in Digital Blocks with Mined Assertions
Authors: D. Zuccala, P. Breuil, J. Daveau, P. Roche, K. Morin-Allory
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11:00 - 11:30 Title: Higher-order Hardware: Implementation and Evaluation of The Cephalopode Graph Reduction Processor
Authors: J. Pope, C. H. Seger, H. Valter
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11:30 - 12:00 (WiP) Title: Physics-Aware Mixed-Criticality Systems Design via End-to-End Verification of CPS
Authors: K. Wilson, A. Al Arafat, J. Baugh, R. Yu, Z. Guo
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12:00 - 12:30 (WiP) Title: Configuring Safe Spiking Neural Controllers for Cyber-Physical Systems through Formal Verification
Authors: A. Gupta, S. Ghosh, A. Banerjee, S. K. Mohalik
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12:30 - 13:30 Lunch Break
13:30 - 15:00 Technical Session 5: WiP - Distributed systems, Sensor fusion, Statecharts
13:30 - 14:00 (WiP) Title: Safety Assurance for Autonomous Systems with Multiple Sensor Modalities
Authors: A. Balakrishnan, R. Bernard, S. Narayanan, V. Kudalkar, Y. Zhao, P. Nagaraja, G. Markov, C. Budnik, H. Degen, L. Lindemann, J. V. Deshmukh
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14:00 - 14:30 (WiP) Title: Efficient Coordination for Distributed Discrete-Event Systems
Authors: B. Jun, E. Lee, M. Lohstroh, H. Kim
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14:30 - 15:00 (WiP) Title: Pragmatic Action Charts
Author: S. Smyth
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15:00 - 15:30 Coffee Break
15:30 - 16:00 Closing Session